The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a semiconductor device capable of preventing a leaning effect and a method for fabricating the same.
In the case of a dynamic random access memory (DRAM) device having a line width under 0.1 μm, an aspect ratio of a gate during formation of a gate structure is dramatically increased as a gate pitch is decreased. A torque is generated on one side when left-right asymmetry of a thermal stress on the gate structure occurs during a subsequent thermal treatment, such as formation of a capping nitride layer. As a result, the gate structure leans to one side (hereinafter, this result is called a leaning effect). Because, the torque is increased as the aspect ratio of the gate is increased, the leaning effect may become increasingly problematic as the gate pitch is decreased.
When the gate leans to one side, a self-aligned contact (SAC) may fail, and thus, production yield may be decreased.
FIGS. 1A to 1C illustrate leaning of a gate structure in accordance with a typical method for fabricating a semiconductor device.
Referring to FIGS. 1A to 1C, an insulation layer 12 is formed over a substrate 11 and then a polysilicon layer, a barrier layer, a tungsten layer, a hard mask layer, and a gate mask are sequentially formed over the insulation layer 12. The hard mask layer, the tungsten layer, the barrier layer are etched, and the polysilicon layer is selectively etched using the gate mask. Therefore, a hard mask pattern 16A, a tungsten pattern 15A, a barrier pattern 14A, and a remaining polysilicon layer 13A are formed over the insulation layer 12, thereby forming a resultant structure. Then, a capping layer 17A is formed over the resultant structure.
Although it is not shown, the capping layer 17A is fully etched and then the remaining polysilicon layer 13A is etched to form a gate structure. Subsequently, a selective oxidation process is performed to improve a damaged edge of the polysilicon layer 13A and to form a bird's beak, thereby improving characteristics of a semiconductor device.
The hard mask pattern 16A and the capping layer 17A include nitride layers. While a subsequent thermal treatment such as formation of the capping layer 17A is performed, the hard mask pattern 16A is expanded due to increasing the density of the hard mask pattern 16A. Thus, a tensile stress is applied to the capping layer 17A that is formed over the hard mask pattern 16A. Since the capping layer 17A covers an entire exposed surface of the gate structure, left-right asymmetry of stress applied on the gate structure causes a torque to be placed one side of the gate structure, which causes the gate structure to lean to one side. In other words, the leaning effect occurs.
Referring to (A) of FIG. 1A, when a right side of the remaining polysilicon layer 13A has a thickness greater than that of a left side of the remaining polysilicon layer 13A, a tensile stress applied on the left side of the capping layer 17A is greater than that applied on the right side of the capping layer 17A because a contact area between the left side of the capping layer 17A and the gate structure is greater than that of the right side of the capping layer 17A. When a force applied by a stress is tensile, a force applied to the left side of capping layer 17A is greater than a force applied to the right side of capping layer 17A.
Referring to (B) of FIG. 1A, a difference between the tensile stresses (i.e., F1a-F2a) causes torque toward a right side because the capping layer 17A covers the entire surface of the gate structure. Thus, since the torque is applied to the gate structure in a vertical direction, the gate structure may lean to the right by a distance related to the difference between the opposing tensile stresses.
Referring to (A) of FIG. 1B, a remaining polysilicon layer 13B has the same thickness as the remaining polysilicon layer 13A in (A) of FIG. 1A. However, a capping layer 17B is formed to have different thicknesses on a left side and a right side of a gate structure. The thickness of the capping layer 17B on the right side is greater than that of the capping layer 17B on the left side. Similar to the stresses described in FIG. 1A, a force applied to the capping layer 17B on the right side is greater than that applied on the left side because the capping layer 17B on the right side is thicker than on the left side. Thus, referring to (B) of FIG. 1B, a difference between the forces (tensile stresses, F2b and F1b) results in a torque toward the left side of the gate structure, which causes the gate structure to lean toward the left side.
Referring to (A) of FIG. 1C, a remaining polysilicon layer 13C has the same thickness as the remaining polysilicon layer 13A in (A) of FIG. 1A. However, when an etching process is performed to form a gate structure, if the right side of the gate structure is not vertically etched, i.e., a profile of a resultant structure is non-uniform, a capping layer 17C is formed to have a slope on the right side of the gate structure. As a result, a contact area between the capping layer 17C on the right side and the gate structure is greater than a contact area between the capping layer 17C on the left side and the gate structure. Thus, referring to (B) of FIG. 1C, a difference between forces (tensile stresses, F2c and F1c) applied to the right side and the left side causes a torque toward the left side of the gate structure, thereby making the gate structure lean toward the left side.
In order to overcome the above described limitations, a post-thermal treatment is performed after the hard mask layer is formed in the process of forming the gate structure. A thermal stress of the hard mask layer is generated before performing the etch process to form the gate structure. Thus, the gate leaning toward one side may be prevented. However, a temperature for the post-thermal treatment should exceed approximately 900° C. to sufficiently generate the thermal stress of the hard mask layer to prevent the gate leaning, so characteristics of devices may be deteriorated due to increasing of a thermal budget.
When decreasing the thickness of the capping layer, the torque, and thus the leaning of the gate structure, decreases. However, when the thickness of the capping layer is under approximately 50 Å, a barrier layer may be abnormally oxidized since hydrogen H2 and oxygen O2 gases may not be sufficiently blocked in a subsequent selective oxidation process. Thus, characteristics of the semiconductor devices may be deteriorated.
FIG. 2 shows micrographic views illustrating a leaning effect of a gate. Referring to FIG. 2, it may be recognized that a critical dimension of a leaning gate on a right side is greater than a critical dimension of a leaning free gate on a left side.